Xgig MCIO 16-lane Interposer Xgig6P-PCIe6-X16-AMCIO for PCI Express 6.0

16-lane MCIO/CopprLink interposer that taps PCIe 6.0 traffic at up to 64 GT/s for capture by the VIAVI Xgig PCIe 6.0 Analyzer.

Maximum data rate: 64GT/s
Compatible PCIe rates: 2.5, 5.0, 8.0, 16 and 32GT/s
Link width: up to 16-lanes
Connectors: Two, 74 pin to 74 pin MCIO connectors on each side of the interposer pod

Datasheet

Overview

The VIAVI Xgig MCIO 16-lane Interposer (Xgig6P-PCIe6-X16-AMCIO) supports analysis of PCIe 6.0 communication across an MCIO/CopprLink internal connection. It enables protocol analysis of communication between a 16-lane MCIO host port and an MCIO-attached endpoint device. Bidirectional PCIe 6.0 protocol data on each of the 16 lanes is captured at up to 64 GT/s, and low-loss custom cables are supplied for connection to the VIAVI Analyzer.

MCIO/CopprLink connections are used in AI servers, storage systems and hyperscale data center environments because they provide high speeds in a compact form factor.

The interposer uses high-speed linear signal redrivers to buffer the system data signals, so that a clean signal is delivered to both the Analyzer and the devices under test. Data flows between the host system's MCIO interface and the MCIO target device as normal, while the signal is tapped inside the interposer from both the upstream and downstream data paths as inputs to the Analyzer.

Working with the VIAVI PCIe 6.0 Analyzer/Exerciser platform, the interposer supports debug and validation of new ICs with MCIO interfaces, MCIO peripherals, host system implementations, firmware and drivers, system BIOS and software, as well as error injection and manufacturing test. It supports full decode and analysis of PCIe data traffic and link states.

Installation

With system power off, the interposer is connected into the MCIO cable path and to the Analyzer chassis using the supplied MCIO or MXIO/CopprLink internal cables. The interposer and Analyzer are then powered on, trace capture conditions are set in the Xgig tools, and the system under test is powered up.

Key Features

Operates at 64GT/s PCIe 6.0 data rates and is compatible with PCIe rates of 2.5, 5.0, 8.0, 16 and 32GT/s
Two 74 pin to 74 pin MCIO connectors on each side of the interposer pod support PCIe links of up to 16 lanes
Supplied with high-quality custom cables for Analyzer attachment
Data path uses high-speed linear redrivers for good signal capture with minimal tuning
Supports Analyzer side-band signal capture and triggering via custom cable
Cables supplied for optional clocking sources
Interposer power is independent of host system
LEDs give quick indication of power and operation
Consistent, repeatable capture of link training, equalization negotiation and other data
Up to two interposers are stackable to support wider link widths
Supported by VIAVI Xgig tool suite including Trace Control, Expert and Serialytics

Specifications

Interface

Maximum data rate	64GT/s PCIe 6.0
Compatible PCIe rates	2.5, 5.0, 8.0, 16 and 32GT/s
Link width	up to 16-lanes Up to two interposers stackable for wider link widths
Connectors	Two, 74 pin to 74 pin MCIO connectors on each side of the interposer pod

Environmental

Operating temperature	-15 to +35° C
Non-operating temperature	-40 to +70° C
Operating humidity	Up to 85% humidity (non-condensing) at +35° C
Non-operating humidity	Up to 85% humidity at +65° C
Altitude for operation/storage	2000 m above sea level (max)
Altitude for transport	12,000 m above sea level (max)
Environment	Pollution Degree 2
Electromagnetic compliance	FCC part 15 Class A, CE Compatibility