VIAVI Xgig Exerciser for CXL v1.1/v2.0 Protocol Exerciser and Compliance Tester
CXL v1.1/v2.0 protocol exerciser for compliance testing and debugging at up to 32GT/s, approved for CXL Gold Suite testing
- Supported protocol versions
- CXL v1.1 and v2.0
- Maximum data rate
- 32GT/s
- Other supported PCIe data rates
- 2.5, 5.0, 8.0 and 16GT/s
- Link widths
- 1, 2, 4, 8 and 16-lanes
Overview
The VIAVI Xgig Exerciser for CXL v1.1/v2.0 adds turn-key compliance test capability to the Xgig CXL product portfolio. It provides full, bit-level, repeatable control over CXL data traffic, which also makes it a tool for debugging difficult protocol communication problems. The Exerciser is approved by the CXL Consortium for CXL Gold Suite workshop compliance testing.
The Exerciser generates CXL compliant data traffic and responds to CXL inputs with appropriate branching. It operates in two modes: Root Complex (RC) or host mode, which enables endpoint testing, and End Point (EP) mode, which enables testing a host system. It supports detailed validation and debug of the state machine of a CXL controller, as well as debug and performance tuning of firmware and application software. It can also be programmed with non-compliant CXL sequences to test boundary and stress conditions.
Analysis and scripting
The Exerciser works in tight association with the Xgig Analyzer function for detailed bit-level trace capture. Bidirectional data of hundreds of gigabytes can be saved for analysis with VIAVI tools such as Expert. A scripting API allows complex, custom test scripts to be created, either from scratch or modified from pre-defined library scripts. Interposers provide the physical link between the Xgig PCIe 5.0 and 6.0 platforms and the device under test.
Compliance testing
The CXL Consortium performs certification testing at two levels: electrical and protocol. The Exerciser enables pre-certification to the Protocol Compliance test suite, and all CXL 1.1 tests can be run. Tests can be executed individually, in groups or all in sequence with a pass-fail result, and a full trace can optionally be saved. Compliance tests are pre-defined and locked, but can be copied, edited and saved as new scripts.
Key Features
- Approved by the CXL Consortium for CXL Gold Suite workshop compliance testing
- Emulates either a Root Complex or an End Point device
- Generates and responds to CXL compliant data packets
- Operates to 32GT/s and supports PCIe data rates of 2.5, 5.0, 8.0 and 16GT/s
- Supports links of 1, 2, 4, 8 and 16 lanes
- Set link rates and widths and control transitions to other rates
- Tightly aligned operation with the Analyzer for fully detailed bit-level trace captures
- LTSSM testing with positive and negative test scenarios via VIAVI LTSSM Override function
- LTSSM state tracker with history log
- Save and load custom test configurations
- User-configurable custom test configurations for positive and negative test cases
- Scripting API for complex, user-created test cases
- Graphical control interface for visual presentation and setup of test procedures
- Xgig tools suite and Exerciser user interface operate on a Windows 10 enabled PC
- Runs on VIAVI 5P16, 5P8 and 6P4 platforms
- Works with the Xgig PCIe5 Exerciser Host-Mode Test Stand
- Supported by the Xgig tool suite including Trace Control, Expert and Serialytics
Specifications
| Supported protocol versions | CXL v1.1 and v2.0 |
|---|---|
| Maximum data rate |
32GT/s
Per lane
|
| Other supported PCIe data rates | 2.5, 5.0, 8.0 and 16GT/s |
| Link widths | 1, 2, 4, 8 and 16-lanes |
| Emulation modes |
Root Complex (RC) or End Point (EP)
RC mode enables endpoint testing; EP mode enables testing a host system
|
| LTSSM supported states | Detect, Quiet, Configuration, L0, L1, Recovery |
| Speed/width transition testing | any speed/width to any other |
| Reset functions | Control and validate reset functions |
|---|---|
| DUT power | Control DUT power |
| Link control | Set data rate; Set link width; Control link width changes; Control link rate changes; Control link state changes |
| LTSSM state transitions | Edit LTSSM state transitions |
| TX/RX parameters | Set TX parameters; Set RX parameters |
| Equalization | Control equalization procedure |
| Error injection | Inject disparity errors option; Inject symbol errors option; Inject Sync Bit errors option |
| Timeouts | Validate state timeouts; Set replay timeouts |
| Test configuration | Save and load custom test configurations; User-configurable custom test suites and execution sequence |
| Results | View test description; View test results; View extensive error count information |
| Supported platforms | VIAVI 5P16, 5P8 and 6P4 platforms |
|---|---|
| Host PC operating system |
Windows 10
Xgig tools suite and the Exerciser user interface
|
Specifications are taken from the manufacturer's documentation. See the datasheet for complete and current values.
Applications
- CXL protocol compliance testing
- CXL pre-certification to the Protocol Compliance test suite
- Endpoint device testing in Root Complex mode
- Host system testing in End Point mode
- CXL controller state machine validation and debug
- Firmware and application software debug and performance tuning
- Boundary and stress condition testing
- Memory and accelerator product development
Options & Accessories
| Option | Description |
|---|---|
| Xgig5P-PCIe5-X16-EC | Xgig 16-lane Exerciser License Key for CXL v1.1/v2.0 |
| Xgig5P-PCIe5-X8-EC | Xgig 8-lane Exerciser License Key for CXL v1.1/v2.0 |
| Xgig5P-PCIe5-X4-EC | Xgig 4-lane Exerciser License Key for CXL v1.1/v2.0 |
| Xgig5P-PCIe5-X16-CX | Xgig 16-lane Analyzer License Key for CXL v1.1/v2.0 |
| Xgig5P-PCIe5-X8-CX | Xgig 8-lane Analyzer License Key for CXL v1.1/v2.0 |
| Xgig5P-PCIe5-X4-CX | Xgig 4-lane Analyzer License Key for CXL v1.1/v2.0 |